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Freescale Semiconductor /MK61F15WS /DDR /CR46

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Interpret as CR46

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)P0ORD 0RESERVED0P0PRIRLX0RESERVED0 (0000)P1PRI00RESERVED

P1PRI0=0000, P0ORD=00

Description

DDR Control Register 46

Fields

P0ORD

Port 0 Order

0 (00): Highest listing in the scan order

1 (01): ------

2 (10): ------

3 (11): Lowest listing in the scan order
RESERVED

Reserved
P0PRIRLX

Port 0 Priority Relax
RESERVED

Reserved
P1PRI0

Port 1 Priority 0 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data